News

Thank you for visiting us!

  • This is HPVLSI Lab

  • Contact if you have any questioon
  •  Prof. Yong-Bin Kim at
  •  ybk@coe.northeastern.edu
  • Useful Information
     
     
     
     
     
     

    Welcome to HPVLSI Lab

    The complexity of today's VLSI systems requires new design methods. The research of the HPVLSI group focuses on methods and tools for the design of high-speed and low-power Digital / Analog Integrated Circuits

    The objectives of the research are

  •  Integrated Circuit Design and Design Method for Nanoelectronics and Nano Technology
  •  Low Power Nanoscale CMOS Integrated Circuit Design
    Issues
  •  Clocking scheme for high performance VLSI systems including on-chip clock skew analysis and clock distribution
  •  Low Power Analog and Mixed Mode Integrated Circuit Design clock skew analysis and clock distribution
  •  High speed integrated circuit signal integrity and physical CAD tool development
  •  Low power and high speed circuit design methodology and technology
  •  Deep sub-micron device phenomena
  •  High speed system integration for signal processing and communication applications
  •  Innovative circuits and system application
  •  Merged DRAM logic technology
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