References

1

Brad Calder, Dirk Grunwald, Joel Emer, ``Predictive Sequential Associative Cache,'' In 2nd International Symposium on High Performance Computer Architecture, San Jose, February 1996.

2

Anant Agarwal and Steven D. Pudar, ``Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct- Mapped Caches,'' In 2oth Annual International Symposium on Computer Architecture, SIGARCH Newsletter, pages 369-380.IEEE, 1995.

3

Anant Agarwal, John Henessey, and Mark Horowitz, ``Performance of Operating Systems and Multiprogramming,'' ACM Transactions on Computer Systems, 6(4):pages 393-431., November 1988.

4

Kimming So and Rudolph N. Rechtschaffen, ``Cache Operations by MRU Change,'' Technical Report RC 11613, IBM T.J. Watson Research Center, November 1985.

5

J. H. Chang, H. Chao, and K. So, ``Cache design of a sub-micron CMOS System/370,'' In 14th Annual International Symposium on Computer Architecture SIGARCH Newsletter, pages 208-213. IEEE, 1987.

6

R.R Kessler,Richard Jooss,Alvin Lebeck and Mark D.Hill, ``Inexpensive implementations of set-associativity ,'' In 16th Annual International Symposium on Computer Architecture SIGARCH Newsletter, IEEE, May 1989.

7

Norm Jouppi, Cache write policies and performance, In 20th Annual International Symposium on Computer Architecture SIGARCH Newsletter, pages 191-201,IEEE, May 1993.

8

John L. Hennessy, and David A. Patterson, Computer Architecture: A Quantitative Approach,2nd Edition Morgan Kaufmann Publishers, Inc., 1995.

9

Amitabh Srivastava and Alan Eustace, ATOM : A System for building customized program analysis tools. In Proceedings of SIGPLAN'94 conference on programming language design and implementation, ACM 1994.