Computer Architecture Students Design Industry Ready Pipelined Processors
The EECE 3324 Computer Architecture course, taught by ECE Teaching Professor Julius Marpaung, concluded with two outstanding final presentations that highlighted the ECE Department’s commitment to preparing students for industry-ready careers. Throughout the course, students applied foundational architectural concepts to design and implement a fully functional pipelined processor.
Building on prior coursework in the RISC-V instruction set architecture (ISA), students were challenged to transfer their knowledge to develop processors based on MIPS and ARM architectures. Because each ISA presents unique design constraints and features, teams were required to carefully adapt and extend their existing processor designs to successfully implement a new architecture.
Team 1 (right), consisting of David Noble, E’26, electrical engineering, and Johnathan Walton, E’26, computer engineering, and Team 2 (left), consisting of Daniel Flynn, E’25, computer engineering & computer science, and Defne Ulusoy, E’26, computer engineering & computer science, each developed an ARM-based processor using distinct design approaches. Over the course of the semester, students refined their designs to meet critical timing requirements, gaining hands-on experience with industry-standard FPGA design tools such as Xilinx Vivado.
We congratulate all students on their accomplishments and wish them continued success in their future academic and professional endeavors.